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Autori: Krajacevic Zoran

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Naslov Synthesizable SystemVerilog Assertions as a Methodology for SoC Verification (Proceedings Paper)
Autori Kastelan Ivan  Krajacevic Zoran 
Info 2009 1ST IEEE EASTERN EUROPEAN CONFERENCE ON THE ENGINEERING OF COMPUTER BASED SYSTEMS, (2009), vol. br. , str. 120-127
Ispravka Web of Science   Citati: Web of Science  
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Naslov Real-Time Wavelet-Spatial-Activity-Based Adaptive Video Enhancement Algorithm for FPGA (Proceedings Paper)
Autori Zlokolica Vladimir M Katona Mihajlo Juenke M Krajacevic Zoran Teslic Nikola Dj Temerinac Miodrag 
Info ADVANCED CONCEPTS FOR INTELLIGENT VISION SYSTEMS, PROCEEDINGS, (2008), vol. 5259 br. , str. 182-193
Ispravka Web of Science   Elečas   Rang časopisa   Citati: Web of Science  
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Naslov Signal processing algorithms implementation with FPGAs (Proceedings Paper)
Autori Katona Mihajlo Krajacevic Zoran Teslic Nikola Dj Kovacevic Vladimir 
Info Telsiks 2005, Proceedings, Vols 1 and 2, (2005), vol. br. , str. 127-130
Ispravka Web of Science   Citati: Web of Science  
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