@ARTICLE{
author={Simonovic Mirela|,Zivojnovic Vojin|,Saranovac Lazar V|0000-0002-6823-1855},
year={2017},
title={Formal Model for System-Level Power Management Design},
journal={PROCEEDINGS OF THE 2017 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE)},
volume={},
number={},
pages={1599-1602},
document_type={Proceedings Paper},
} 

@ARTICLE{
author={Simonovic Mirela|,Zivojnovic Vojin|,Saranovac Lazar V|0000-0002-6823-1855},
year={2016},
title={An Approach to Modeling Clock Tree of a Complex System-on-Chip},
journal={2016 24TH TELECOMMUNICATIONS FORUM (TELFOR)},
volume={},
number={},
pages={758-761},
document_type={Proceedings Paper},
} 

@ARTICLE{
author={Simonovic Mirela|,Zivojnovic Vojin|,Mista Davorin|,Jankovic Strahinja P|0000-0003-1473-1157,Saranovac Lazar V|0000-0002-6823-1855},
year={2013},
title={Energy Proportional Management of Residential Gateways},
journal={2013 21ST TELECOMMUNICATIONS FORUM (TELFOR)},
volume={},
number={},
pages={636-+},
document_type={Proceedings Paper},
}